Jane Street’s blog post explains that the ASIC puzzle handed participants the final GDS layout of a small chip and asked them to determine its function without a netlist or internal signal names. The chip is a hardware checker for an 11×11 Star Battle puzzle, also known as “Two Not Touch”. It accepts 121 cycles of binary inputs, each indicating whether to place a star in the corresponding square. Internally, the design runs parallel checks: a 2‑bit counter for each row and column requiring exactly two stars, a 121‑bit ROM that maps squares to coloured regions together with a 2‑bit counter per region (also requiring two stars), a delay line that ensures no two stars touch—even diagonally—and a total‑star counter used for Easter‑egg outputs. All checks are ANDed to produce a success signal. When success is asserted, the output generator emits a solution string. The strings are stored in ROM but are obfuscated with a small LFSR driven by the game board; solving the puzzle requires deobfuscating the string. Most incorrect attempts yield the message “TRY AGAIN”, while certain incorrect boards trigger Easter‑egg messages. These include a 57×57 pixel Jane Street logo formed by about 1,400 isolated metal‑2 squares, the Morse code “PER ARENAM AD ASTRA” (through the sand, to the stars) etched in an unused layer, and a floating‑wire bug in the “TWO NOT TOUCH” path that causes the output to appear as “TWO”

Jane Street logo composed of 1,366 metal-2 squares and Morse code PER ARENAM AD ASTRA in layer 200
Egg Easter features: the Jane Street logo formed by metal-2 shapes and the Morse code message etched in an unused layerblog.janestreet.com

The article describes that incorrect boards trigger Easter‑egg messages, including a 57×57 pixel Jane Street logo made of about 1,400 isolated metal‑2 squares and the Morse code “PER ARENAM AD ASTRA” etched in an unused layer.

Simulated clock, enable, success and output signals showing success after 121st bit and output spelling (* TWO STARS *)
Success signal rises after the 121st input bit and the obfuscated output spells (* TWO STARS *) one byte per clockblog.janestreet.com

When success is asserted, the output generator emits a solution string stored in ROM but obfuscated with a small LFSR driven by the game board; solving requires deobfuscation. Most incorrect attempts yield “TRY AGAIN”, while certain incorrect boards trigger Easter‑egg messages.

Annotated chip layout highlighting counters, rule checkers, region map and output generator with dashed boxes
Sanjay Ravishankar's annotated layout shows the internal blocks: row/column counters, region checker, delay line and output generatorblog.janestreet.com

Internally, the design runs parallel checks: a 2‑bit counter for each row and column requiring exactly two stars, a 121‑bit ROM that maps squares to coloured regions together with a 2‑bit counter per region, a delay line that ensures no two stars touch—even diagonally—and a total‑star counter used for Easter‑egg outputs.

Register positions colored by first‑high cycle during an all‑ones run, with row‑count and adjacency rejection flags highlighted
Register activity during an all‑ones test illustrates row‑count and adjacency checking logicblog.janestreet.com

The chip accepts 121 cycles of binary inputs; internally it runs parallel checks including row/column counters and a delay line preventing diagonal adjacency.