In February 2026, while maintaining the loong13 port of Debian 13 to the LoongArch architecture, developer Wang Miao encountered a persistent infinite loop in the test suite of the normaliz mathematics library during package builds. The loop, governed by an OpenMP atomic counter intended to track processed data points, failed to increment correctly despite all data points being processed, causing the test to timeout repeatedly.
Investigation revealed that the issue stemmed from the Loongson LA664 core's atomic add instruction (amadd.d) losing updates under specific concurrency conditions: when two threads executing on different physical cores performed atomic operations without a data barrier on the same memory address, and at least one thread interleaved a LASX vectorized memory read (xvld) between those operations. The same loss of atomicity was observed for other atomic instructions such as compare-and-swap (amcas), atomic maximum (amax), and atomic swap (aswap), but not when a data barrier was included (e.g., amcas_db.d). The problem depended on the precise alignment between the atomic variable's address and the address read by the vector load, with failure rates approaching 100% when both threads performed LASX reads.
Loongson identified the root cause as a missing internal control bit in the processor's MCSR24 control/status register. Setting bit 13 of MCSR24 to 1 suppresses the lost-update behavior, with test firmware confirming the fix. Loongson reported that the fix incurs negligible single-core performance impact and only a minor multi-core slowdown, and announced that a production firmware update containing the bit would be released before the National Day holiday on October 1, 2026, allowing users to upgrade their LA664-based systems.
This erratum corresponds to the Loongson LA664 core bug described in the article, showing the official notice of the missing control bit fix.